1. Field of the Invention
The present invention relates to techniques for assembling systems comprised of integrated circuits. More specifically, the present invention relates to a method and an apparatus that uses electrostatic forces to precisely align semiconductor chips relative to each other to facilitate system assembly.
2. Related Art
Advances in semiconductor technology presently make it possible to integrate large-scale systems, including tens of millions of transistors, into a single semiconductor chip. Integrating such large-scale systems onto a single semiconductor chip increases the speed at which such systems can operate, because signals between system components do not have to cross chip boundaries, and are not subject to lengthy chip-to-chip propagation delays. Moreover, integrating large-scale systems onto a single semiconductor chip significantly reduces production costs, because fewer semiconductor chips are required to perform a given computational task.
Unfortunately, these advances in semiconductor technology have not been matched by corresponding advances inter-chip communication technology. Semiconductor chips are typically integrated onto a printed circuit board that contains multiple layers of signal lines for inter-chip communication. However, signal lines on a semiconductor chip are about 100 times more densely packed than signal lines on a printed circuit board. Consequently, only a tiny fraction of the signal lines on a semiconductor chip can be routed across the printed circuit board to other chips. This problem is beginning to create a bottleneck that continues to grow as semiconductor integration densities continue to increase.
Researchers have begun to investigate alternative techniques for communicating between semiconductor chips. One promising technique involves directly connecting two or more chips together face-to-face. In such an arrangement, hundreds or thousands of pads on the top-side of each chip come in contact or close proximity to matching pads on the other chip. Hence, the density of connections is very high and the distance the signals must travel is measured in microns instead of millimeters or centimeters.
In such a chip-to-chip scheme, there are several techniques by which electrical connections may be made between the pads. One technique is to provide solder balls on the pads of one chip. If the chips are placed face-to-face and nearly aligned, heating the solder balls makes electrical contact with the matching pads on the second chip and surface tension pulls the second chip into precise alignment.
Another technique is to communicate through capacitive coupling rather than through a direct connection. In this technique, each chip is manufactured with metal pads covered with an insulating layer of overglass about one micron thick. These chips are positioned face-to-face with the pads aligned. Capacitive coupling causes a voltage change on a transmitter pad to induce a voltage change on a corresponding receiver pad of the facing chip. This makes it possible to transmit signals directly between the chips without having to route the signal through intervening signal lines within a printed circuit board.
However, this technique requires precise alignment of chips without the benefit of surface tension pulling nearly aligned structures into precise alignment. Note that it is possible to align the facing chips precisely with micromanipulators, especially if electrical measurements of the quality of alignment can be made during the alignment process. However, use of such micromanipulators is time-consuming and expensive.
Hence, what is needed is a method and an apparatus for aligning semiconductor chips relative to each other without the problems listed above.